Self-calibration in a memory device
AssigneeMicron Technology, Inc.
InventorsJennifer E. Taylor, Eric J. Stave, Timothy M. Hollis, Chulkyu Lee, Chris Gregory Holub
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Abstract
Systems and methods include self-training an equalizer of a semiconductor device using the semiconductor device. The semiconductor device receives an indication of a condition for re-training of the equalizer. The semiconductor device operates the equalizer based on trained values derived during the self-training. The semiconductor device also determines that the condition has been met, and in response, the semiconductor device re-trains the equalizer without invocation of re-training by a host device coupled to the semiconductor device.
Claims20
A method, comprising:
- self-training an equalizer of a semiconductor device using the semiconductor device;
- at the semiconductor device, receiving an indication of a condition upon which re-training of the equalizer is to be conducted;
- operating the equalizer based on trained values derived during the self-training;
- determining, using the semiconductor device, that the condition has been met;
- and
- re-training the equalizer by the semiconductor device without invocation of re-training by a host device coupled to the semiconductor device, wherein re-training comprises re-training disabled memory ranks even while other memory ranks are active.
A semiconductor device, comprising:
- a receiver configured to receive data bits from another device and to latch at least some of the data bits in parallel in a first set of latches using a first reference voltage and in a second set of latches using a second reference voltage;
- and
- self-calibration circuitry configured to increment a bit counter based on bit comparisons, comprising:
- averaging circuitry comprising the bit counter configured to track a number of increments by the self-calibration circuitry, and the averaging circuitry is configured to track the number of the bit comparisons;
- and
- adder/subtractor circuitry configured to add a value to or subtract the value from a present setting based on the number of increments counted to generate a new setting.
Self-calibration circuitry configured to perform self-training in a memory device, wherein the self-calibration circuitry comprises:
- an input configured to receive first and second latched bits captured at the memory device and to increment a first bit counter based on a comparison of the first and second latched bits;
- digital averaging circuitry comprising:
- the first bit counter configured to track the number of increments determined;
- and
- a second bit counter configured to track the number of bit comparisons performed;
- and
- adder/subtractor circuitry configured to:
- receive an indication of a previous setting of an equalizer;
- and
- add an incremental value to or subtract the incremental value from the previous setting to output a new setting based at least in part on the indication of the previous setting and the number of increments counted in the first bit counter.
Dependencies are inferred from the claim text.