Circuitry for accelerated multiplication of sparse matrices by parallel accumulation operations

A computing device comprising:

• one or more processors;
• a sparse processing circuit comprising:
• a plurality of iteration processor circuits configured to generate mapping of a subset of indices of non-zero elements in a first tensor to locations of accumulators by parallel processing the subset of indices, the first tensor derived from a sparse weight tensor to at least remove zero elements from the sparse weight tensor, and
• an associative mapping circuit configured to assist or perform retrieving of accumulator values stored in the accumulators;
• and
• memory configured to store:
• the non-zero elements in the first tensor and indices of the non-zero elements along a first dimension,
• the accumulated values of the accumulators, and
• instructions that cause the one or more processors or the sparse processing circuit to:
• retrieve accumulator values from accumulators corresponding to received indices,
• update the retrieved accumulator values by processing the non-zero elements of the first tensor corresponding to the received indices with non-zero elements of a second tensor in parallel,
• store the updated accumulator values in the mapped accumulators, and
• apply an activation function to the stored accumulator values to generate an output tensor.

A non-transitory computer-readable storage medium storing instructions thereon, the instructions when executed by one or more processors cause the one or more processors to:

• receive indices of non-zero elements in a first tensor along a first dimension of the first tensor, the first tensor derived from a sparse weight tensor to at least remove zero elements from the sparse weight tensor;
• generate mapping of a subset of the indices to locations of accumulators stored in a memory system by parallel processing the subset of indices in a plurality of first circuits;
• retrieve accumulator values from the mapped accumulators of the memory system;
• update the retrieved accumulator values by processing the non-zero elements of the first tensor corresponding to the received indices with non-zero elements of a second tensor in parallel;
• store the updated accumulator values in the mapped accumulators of the memory system;
• and
• apply an activation function to the stored accumulator values to generate an output tensor.