Pattern-based cache eviction

A system comprising:

• a memory;
• and
• at least one processor that is operatively coupled to the memory, the at least one processor being configured to perform the operations of:
• receiving a collection of input/output (I/O) operations;
• analyzing the collection of I/O operations for one or more access patterns;
• generating a predictive model based on the one or more access patterns, the predictive model configured to forecast a future I/O operation;
• and
• in response to writing a data block to a cache, inputting write-operation information for the data block to the predictive model to determine, based on a forecasted read-after-write interval for the data block, an eviction event for the data block, wherein the eviction event controls retention of the data block in the cache.

A non-transitory computer-readable medium storing one or more processor-executable instructions, which when executed by at least one processor cause the at least one processor to perform the operations of:

• receiving a collection of input/output (I/O) operations;
• analyzing the collection of I/O operations for one or more access patterns;
• generating a predictive model based on the one or more access patterns, the predictive model configured to forecast a future I/O operation;
• and
• in response to writing a data block to a cache, inputting write-operation information for the data block to the predictive model to determine, based on a forecasted read-after-write interval for the data block, an eviction event for the data block, wherein the eviction event controls retention of the data block in the cache.