Hardware-Assisted Instruction-Level Debugging

Abstract

The present document describes techniques for use in troubleshooting and debugging complex circuits, devices, and systems. These techniques may be implemented to provide hardware-assisted instruction-level debugging. By way of an example, techniques are provided that may be implemented in an apparatus having a plurality of state sequencers. The techniques may include receiving signals from a plurality of state sequencers, and storing an instruction history indicated, at least in part, by one or more of the signals received from a selected one of the state sequencers. The stored instruction history may indicate at least a state of the selected state sequencer during a specific cycle of instruction execution.

Dependencies are inferred from the claim text.