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US 2026/0200722 A1Published application
Mems device built using the beol metal layers of a solid state semiconductor process
AssigneeNanusens SL
InventorJosep Montanyà i Silvestre
Life of this patent
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Abstract
A method for a modified CMOS or solid-state process including using a double mask in the passivation process to form a passivation opening. The process includes applying a first mask to form a passivation layer and applying as second mask to form a SiO2 layer positioned underneath the passivation layer.
Claims20
A method for a modified CMOS or solid-state process comprising:
- using a double mask in the passivation process to form a passivation opening including:
- applying a first mask to form a passivation layer;
- and
- applying a second mask to form a SiO2 layer positioned underneath the passivation layer.
1 more element
A pad in an integrated circuit comprising:
- a passivation layer having a passivation opening;
- an oxide layer positioned below the passivation layer having an oxide layer opening;
- wherein a portion of the passivation layer overlaps the oxide layer and wherein the passivation opening has a smaller size than the oxide opening.
An integrated circuit chip comprising:
- a MEMS device formed using the materials of the BEOL of a CMOS process, wherein a post-processing and post backing was applied to form the MEMS device after the first region is filled with the metal filling structures;
- a pad including:
- a passivation layer having a passivation opening;
- an oxide layer positioned below the passivation layer having an oxide layer opening;
- wherein a portion of the passivation layer overlaps the oxide layer;
- wherein the passivation opening has a smaller size than the oxide opening;
- and
- wherein the pad includes a top metal layer arranged to extend laterally beyond the passivation opening in all directions preventing etching of SiO2 material beyond the top metal layer during the post-processing.
5 more elements
Dependencies are inferred from the claim text.