Interconnection structure, and method for fabricating the same
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChin-Lung CHUNG, Shin-Yi YANG, Tsu-Chun KUO
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Abstract
A method is provided for fabricating an interconnection structure. A first metal feature and a first dielectric layer surrounding the first metal feature are formed on a semiconductor substrate. A second metal feature is formed to be aligned with and cover the first metal feature. The second metal feature is different from the first metal feature in terms of materials. A second dielectric layer is deposited over the first dielectric layer and the second metal feature. A trench is formed in the second dielectric layer to reveal the second metal feature. A metal line is formed in the trench.
Claims20
A method for fabricating an interconnection structure, comprising:
- forming a first metal feature and a first dielectric layer on a semiconductor substrate, the first dielectric layer surrounding the first metal feature;
- forming a second metal feature aligned with and covering the first metal feature, the second metal feature being different from the first metal feature in terms of materials;
- depositing a second dielectric layer over the first dielectric layer and the second metal feature;
- forming a trench in the second dielectric layer to reveal the second metal feature;
- and
- forming a metal line in the trench.
A method for fabricating an interconnection structure, comprising:
- forming a metal via and a first dielectric layer on a semiconductor substrate, where the first dielectric layer surrounds the metal via, and the metal via extends in an upward direction from a conductive component underlying the first dielectric layer;
- forming a metal feature over the metal via, where the metal feature is different from the metal via in terms of materials, and has a bottom surface disposed completely on a top surface of the metal via;
- and
- forming a metal line over the first dielectric layer and the metal feature, where the metal line is spaced apart from the metal via, is electrically connected to the metal via through the metal feature, and extends in a lateral direction transverse to the upward direction.
An interconnection structure, comprising:
- a first dielectric layer disposed on a semiconductor substrate;
- a first metal feature disposed in the first dielectric layer and extending upward;
- a second dielectric layer disposed over the first dielectric layer;
- a metal line disposed in the second dielectric layer and over the first metal feature;
- and
- a second metal feature disposed between the first metal feature and the metal line;
- wherein the metal line is electrically connected to the first metal feature through the second metal feature;
- and
- wherein the second metal feature is different from the first metal feature in terms of materials.
Dependencies are inferred from the claim text.