Transistor and method for manufacturing the same
AssigneeSemiconductor Energy Laboratory Co., Ltd.
InventorShunpei YAMAZAKI
Life of this patent
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Abstract
An object is to provide a highly reliable transistor. In a bottom-gate transistor including an oxide semiconductor layer as a semiconductor layer where a channel is formed, an insulating layer containing excess oxygen is formed over the oxide semiconductor layer, and then an insulating layer through which impurities do not easily pass is formed without exposure to the air. As the insulating layer through which impurities do not easily pass, an aluminum oxide layer or the like can be used. When a conductive layer with a function of absorbing hydrogen is used for a source electrode and a drain electrode, the amount of hydrogen in the oxide semiconductor layer can be reduced.
Claims4
A semiconductor device comprising:
- a first electrode;
- a first insulating layer comprising a region provided over the first electrode;
- a second insulating layer comprising a region provided over the first insulating layer;
- a semiconductor layer comprising a region provided over the second insulating layer;
- a third insulating layer comprising a region provided over the semiconductor layer;
- a second electrode comprising a region provided over the third insulating layer;
- and
- a fourth insulating layer comprising a region provided over the second electrode,
- wherein in a channel width direction of the semiconductor layer, the first insulating layer comprises a region in contact with the fourth insulating layer,
- wherein in the channel width direction of the semiconductor layer, the third insulating layer comprises a region covering an end portion of the semiconductor layer and a region in contact with the second insulating layer, and
- wherein the same potential is supplied to the first electrode and the second electrode.
A semiconductor device comprising:
- a first electrode;
- a first insulating layer comprising a region provided over the first electrode;
- a second insulating layer comprising a region provided over the first insulating layer;
- a semiconductor layer comprising a region provided over the second insulating layer;
- a third insulating layer comprising a region provided over the semiconductor layer;
- a second electrode comprising a region provided over the third insulating layer;
- and
- a fourth insulating layer comprising a region provided over the second electrode,
- wherein in a channel width direction of the semiconductor layer, the first insulating layer comprises a region in contact with the fourth insulating layer,
- wherein in the channel width direction of the semiconductor layer, the third insulating layer comprises a region covering an end portion of the semiconductor layer and a region in contact with the second insulating layer,
- wherein in a plan view, the second insulating layer comprises a region covering the semiconductor layer, and
- wherein the same potential is supplied to the first electrode and the second electrode.
Dependencies are inferred from the claim text.