Semiconductor structure and method for forming the same

A method for forming a semiconductor structure, comprising:

• forming a first active region and a second active region over a substrate;
• forming an isolation structure between lower portions of the first active region and the second active region;
• forming a first source/drain feature and a second source/drain feature on the first active region and the second active region, respectively;
• forming a contact etching stop layer to cover the first source/drain feature and the second source/drain feature, wherein a dielectric constant of the contact etching stop layer is higher than a dielectric constant of the isolation structure;
• forming an interlayer dielectric layer over the contact etching stop layer;
• forming a first gate stack and a second gate stack to surround the first active region and the second active region;
• forming an etch mask over the interlayer dielectric and the first and second gate stacks, wherein the etch mask includes protection features covering top surfaces of the first and second gate stacks;
• etching the interlayer dielectric layer, the contact etching stop layer and at least one of the first source/drain feature and the second source/drain feature using the etch mask to form a first opening over the isolation structure;
• and
• forming a first isolation feature in the first opening.

A semiconductor structure, comprising:

• a first source/drain feature over a first fin element;
• a second source/drain feature over a second fin element;
• a first gate stack and a second gate stack across the first fin element and the second fin element, wherein the first fin element and the second fin element extend lengthwise along a first direction, and the first gate stack and the second gate stack extend lengthwise along a second direction that is different than the first direction,
• a dielectric layer covering the second source/drain feature and the first source/drain feature;
• an isolation feature interposed between the first source/drain feature and the second source/drain feature and between the first gate stack and the second gate stack;
• and
• a contact structure in the dielectric layer and electrically coupled to the first source/drain feature by way of a silicide layer, and an electrical conductivity of the silicide layer is between an electrical conductivity of the contact structure and an electrical conductivity of the first source/drain feature.