Component Carrier with Different Line Spacing in Metal Traces, and Manufacture Method
AssigneeAT&S Austria Technologie & Systemtechnik Aktiengesellschaft
InventorsJeesoo MOK, Artan BAFTIRI
Life of this patent
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Abstract
A component carrier, including a stack with i) at least one electrically insulating layer structure; ii) a plurality of first electrically conductive traces in and/or on the at least one electrically insulating layer structure, and including a first line spacing; and iii) a plurality of second electrically conductive traces in and/or on the at least one electrically insulating layer structure, and including a second line spacing. The second line spacing is larger than the first line spacing, and a first surface of at least one first electrically conductive trace is smoother or rougher than a second surface of at least one second electrically conductive trace.
Claims19
A component carrier, comprising a stack with:
- at least one electrically insulating layer structure;
- a plurality of first electrically conductive traces in and/or on the at least one electrically insulating layer structure, and comprising a first line spacing;
- and
- a plurality of second electrically conductive traces in and/or on the at least one electrically insulating layer structure, and comprising a second line spacing;
- wherein the second line spacing is larger than the first line spacing, and
- wherein a first surface of at least one first electrically conductive trace is smoother or rougher than a second surface of at least one second electrically conductive trace.
A method of manufacturing a component carrier, the method comprising:
- forming a stack comprising at least one electrically insulating layer structure;
- forming a plurality of first electrically conductive traces, comprising a first line spacing, in and/or on the stack;
- and
- forming a plurality of second electrically conductive traces, comprising a second line spacing, in and/or on the stack;
- wherein the second line spacing is larger than the first line spacing, and
- wherein a first surface of at least one first electrically conductive trace is smoother or rougher than a second surface of at least one second electrically conductive trace.
A method, comprising:
- arranging plurality of first electrically conductive traces with a first line spacing and a plurality of second electrically conductive traces with a second line spacing different from the first line spacing in and/or on a stack of electrically insulating layers in a component carrier, wherein said first conductive traces have a smoother surface and a lower line spacing than the second electrically conductive traces of the component carrier, and
- guiding signals with a frequency of at least 6 GHz in and/or on the component carrier.
Dependencies are inferred from the claim text.