System and method providing efficient packing of unaligned data
AssigneeIntel Corporation
InventorsPierre Boudier, Sebastian Björn Herholz, Matthaeus Georg Chajdas, Graham John Sellers, Marcus Rogowsky
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AssigneeIntel Corporation
InventorsPierre Boudier, Sebastian Björn Herholz, Matthaeus Georg Chajdas, Graham John Sellers, Marcus Rogowsky
Estimating the term…
A processing system comprises a memory and a processor configured to store multiple data elements of non-power-of-two bit width across plural registers with power-of-two bit width. The processor stores each bit of the data elements in separate registers, with the first bit in a first register, second bit in a second register, and so on. Arithmetic operations are performed on corresponding bits across registers. The number of data elements equals the register bit width. An arithmetic logic unit concurrently operates on the data elements using bits stored across registers. The system enables efficient storage and processing of low-precision values, optimizing cache usage and reducing wasted bits. This novel approach improves performance for applications like artificial intelligence using narrow data types.
An apparatus comprising:
A method comprising:
At least one computer-readable medium having stored thereon instructions which, when executed, cause a computing device to perform operations comprising:
Dependencies are inferred from the claim text.