System and method for predicting power consumption of integrated circuit and method for designing integrated circuit using the same
AssigneeSK hynix Inc.
InventorKyeong Seob KIM
Life of this patent
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Abstract
A system for predicting power consumption includes a simulator configured to generate vector data by verifying a function of a target circuit implemented with Register-Transfer Level (RTL) design data; and a power prediction circuit configured to predict, before the RTL design data is synthesized into a gate level, power consumption by allowing the target circuit implemented with the RTL design data to process a plurality of requests for a preset prediction time using the vector data as an input vector.
Claims13
A system comprising:
- a simulator configured to generate vector data by verifying a function of a target circuit implemented with Register-Transfer Level (RTL) design data;
- and
- a power prediction circuit configured to predict, before the RTL design data is synthesized into a gate level, power consumption by allowing the target circuit implemented with the RTL design data to process a plurality of requests for a preset prediction time using the vector data as an input vector.
An operating method of a system for predicting power consumption of a target circuit, the operating method comprising:
- generating vector data by verifying a function of a target circuit implemented with Register-Transfer Level (RTL) data;
- and
- predicting power consumption by controlling the target circuit implemented with the RTL design data so that, before the RTL design data is synthesized into a gate level, a plurality of requests are processed for a preset prediction time using the vector data as an input vector.
An operating method of a system for designing a target circuit, the operating method comprising:
- receiving, by the system, Register-Transfer-Level (RTL) data corresponding to a result of behavioral-level design of the target circuit;
- generating, by the system, vector data by verifying a function of the target circuit implemented with the RTL design data;
- when verification of the function succeeds, predicting, by the system, power consumption by controlling the target circuit implemented with the RTL design data so that a plurality of requests are processed for a preset prediction time using the vector data as an input vector;
- and
- synthesizing, by the system, the RTL design data, power consumption of which is predicted, into a gate level.
Dependencies are inferred from the claim text.