Debugging instruction execution errors in a simulated computer system

A computer implemented method, comprising:

• selecting two builds of a same simulator codebase configured to simulate a guest system architecture that are expected to behave identically for a workload, wherein the two builds are generated using different build configurations;
• executing the workload on both builds;
• performing trace operations for both executions;
• comparing checksums generated at a reporting frequency to detect a mismatch;
• and
• responsive to the mismatch being detected, localizing an instruction execution deviation using instruction count and reporting frequency.

A non-transitory computer-readable storage medium storing instructions that, when executed by one or more processors, cause a computing system to:

• select two builds of a same simulator codebase configured to simulate a guest system architecture that are expected to behave identically for a workload, wherein the two builds are generated using different build configurations;
• execute the workload on both builds;
• perform trace operations for both executions;
• compare checksum values at a reporting frequency to obtain a partial total first checksum value, a partial total second checksum value, and an instruction count;
• determine that a result of comparing the checksum values indicates a mismatch;
• and
• responsive to the mismatch, localize an instruction execution deviation using the instruction count and the reporting frequency.