Semiconductor chip and semiconductor package including the same

A semiconductor chip comprising:

• a semiconductor substrate;
• a plurality of transistors on the semiconductor substrate in a main chip region of the semiconductor chip;
• a through structure in a residual scribe lane region of the semiconductor chip, wherein the residual scribe lane region surrounds the main chip region, and wherein the through structure extends through the semiconductor substrate in a vertical direction;
• and
• a heat transfer pad in the residual scribe lane region, wherein the heat transfer pad is on the through structure, and
• wherein the through structure comprises an integrally formed body that extends from a bottom surface of the heat transfer pad to a lowermost surface of the semiconductor substrate, and
• wherein the through structure is configured to transfer heat generated in the main chip region away from the semiconductor chip.

A semiconductor package comprising:

• a package substrate;
• a semiconductor chip stack mounted on the package substrate and including a plurality of semiconductor chips stacked in a vertical direction, wherein each semiconductor chip comprises a main chip region and a residual scribe lane region surrounding the main chip region;
• and
• a molding member surrounding the semiconductor chip stack, wherein each semiconductor chip of the plurality of semiconductor chips comprises:
• a semiconductor substrate spanning the main chip region of the semiconductor chip and the residual scribe lane region of the semiconductor chip,
• a stacked insulating structure on the semiconductor substrate,
• a passivation layer on the stacked insulating structure,
• a plurality of bump pads in the main chip region of the semiconductor chip, wherein the plurality of bump pads are exposed through first openings, respectively, in the passivation layer,
• a heat transfer pad in the residual scribe lane region of the semiconductor chip, wherein the heat transfer pad is through a second opening in the passivation layer, and
• a through structure in the residual scribe lane region of the semiconductor chip, wherein the through structure extends through the stacked insulating structure and the semiconductor substrate in the vertical direction from a bottom surface of the heat transfer pad to a lowermost surface of the semiconductor substrate, and
• wherein, in the semiconductor chip stack, the plurality of semiconductor chips are mounted to one another through:
• the plurality of bump pads of the plurality of semiconductor chips, and
• a plurality of solder bumps on the heat transfer pads of the plurality of semiconductor chips.