Method for manufacturing semiconductor package

A method for manufacturing a semiconductor package, comprising:

• preparing an intermediate structure comprising a base material and a redistribution layer, the base material having a first main surface and a second main surface on a rear side of the first main surface, the redistribution layer being provided on the first main surface and comprising an insulating resin layer and wiring provided in the insulating resin layer, the base material comprising a resin portion comprising a through portion penetrating from the first main surface to the second main surface, the redistribution layer forming a trench having a bottom surface on which the through portion is exposed;
• and
• cutting the through portion along the trench, thereby forming a plurality of wiring structures, each comprising the divided base material and the redistribution layer provided on the base material,
• wherein the base material comprises
• an internal redistribution layer provided inside the first main surface and the second main surface and comprising an internal insulating resin layer and wiring provided in the internal insulating resin layer;
• a plurality of relay wiring portions provided on a side of the internal redistribution layer facing the first main surface and connected to the wiring of the internal redistribution layer;
• a first sealing resin layer that seals the relay wiring portion on the internal redistribution layer;
• a plurality of semiconductor components provided on a side of the internal redistribution layer facing the second main surface and connected to the wiring of the internal redistribution layer;
• and
• a second sealing resin layer that seals the semiconductor component on the internal redistribution layer,
• wherein the internal redistribution layer forms an internal trench having a bottom surface on which the first sealing resin layer is exposed,
• the second sealing resin layer fills the internal trench,
• the bottom surface of the trench and the bottom surface of the internal trench overlap as viewed from a thickness direction of the base material,
• the resin portion comprises the first sealing resin layer and the second sealing resin layer,
• the through portion is cut along both the trench and the internal trench, and
• the plurality of wiring structures being formed each comprises the relay wiring portion and the plurality of semiconductor components electrically connected via the relay wiring portion,
• wherein the intermediate structure is prepared in a way that includes
• forming the internal redistribution layer on a carrier substrate, the internal distribution layer forming the internal trench having a bottom surface on which the carrier substrate is exposed;
• arranging the plurality of semiconductor components on a side of the internal redistribution layer opposite to the carrier substrate;
• forming the second sealing resin layer sealing the semiconductor component and filling the internal trench on the internal redistribution layer;
• separating the carrier substrate from the internal redistribution layer;
• arranging the plurality of relay wiring portions on a side of the internal redistribution layer opposite to the semiconductor component;
• forming the first sealing resin layer sealing the relay wiring portion on the internal redistribution layer;
• and
• forming the redistribution layer on a side of the relay wiring portion and the first sealing resin layer opposite to the internal redistribution layer, the redistribution layer forming the trench having a bottom surface on which the first sealing resin layer is exposed.