Method for preventing voids in contact plugs using selective passivation layers in semiconductor fabrication

A method, comprising:

• depositing a dielectric layer over a lower epitaxial structure of a lower transistor;
• forming an upper epitaxial structure of a upper transistor over the dielectric layer;
• patterning an opening extending downwardly through the upper epitaxial structure and the dielectric layer to expose the lower epitaxial structure;
• forming an upper metal silicide on the upper epitaxial structure within the opening;
• selectively forming an inhibitor layer over the upper metal silicide, leaving the dielectric layer uncovered;
• conformally depositing a metal liner over the dielectric layer within the opening, while keeping the inhibitor layer exposed;
• removing the inhibitor layer after conformally depositing the metal liner;
• and
• forming a metal layer over the metal liner and the lower and upper metal silicides within the opening to create a source/drain contact.

A semiconductor structure, comprising:

• a first transistor, comprising a first source/drain region;
• a second transistor positioned over the first transistor, the second transistor comprising a second source/drain region, wherein the second source/drain region overlaps at least a portion of the first source/drain region;
• a first metal silicide layer formed over a top surface of the first source/drain region;
• a second metal silicide layer formed along a sidewall of the second source/drain region;
• a contact plug extending from the first metal silicide layer to the second metal silicide layer;
• and
• a carbon-containing inhibitor residue on a sidewall of the contact plug.