Superjunction transistor device having transistor cells with a compensation region

A transistor device, comprising:

• a semiconductor body;
• a drift region in the semiconductor body;
• a plurality of transistor cells;
• and
• a gate node and a source node;
• wherein each of the plurality of transistor cells comprises:
• a first trench electrode insulated from the semiconductor body by a first dielectric layer;
• a second trench electrode insulated from the semiconductor body by a second dielectric layer;
• a source region and a body region;
• and
• a compensation region,
• wherein the compensation region adjoins the first dielectric layer and the second dielectric layer in a first mesa region between the first trench electrode and the second trench electrode, and forms a pn-junction with the drift region,
• wherein from the first trench electrode and the second trench electrode, at least the first trench electrode is connected to the gate node, and
• wherein the source region and the body region are arranged in a second mesa region different from the first mesa region, the second mesa region being adjacent the first trench electrode.