Semiconductor structure and fabrication method thereof

A fabrication method of a semiconductor structure, comprising:

• providing a stacked-layer structure on a base substrate, wherein the stacked-layer structure includes sacrificial layers and channel layers alternately stacked along a vertical direction;
• along a direction perpendicular to an extension direction of a channel layer, forming a dummy gate dielectric layer, crossing the stacked-layer structure and covering a top and a sidewall of the stacked-layer structure, on the base substrate;
• forming a dummy gate layer, crossing the stacked-layer structure and covering the dummy gate dielectric layer, on the dummy gate dielectric layer;
• forming a gate spacer on a sidewall of the dummy gate layer;
• removing a portion of the dummy gate dielectric layer from the sidewall of the stacked-layer structure along the extension direction of the channel layer to expose a portion of each sacrificial layer;
• removing a portion of each sacrificial layer along the extension direction of the channel layer through the exposed portion of each sacrificial layer to form a groove on each side of the sacrificial layer;
• forming an inner spacer in the groove;
• removing the dummy gate layer, a portion of the dummy gate dielectric layer covered by the dummy gate layer, and the sacrificial layers, thereby retaining the channel layers, spaced apart from each other and suspended above the base substrate, as a channel-layer structure;
• and
• forming a gate structure crossing the channel-layer structure, wherein the gate structure is around each channel layer along the direction perpendicular to the extension direction of the channel layer.