Selective area template for two-dimensional epitaxial channel growth on large wafers with functionalized patterned areas

An apparatus, comprising:

• a first terminal and a second terminal in a transistor structure in a substrate;
• a gate stack in the transistor structure and between the first and second terminals, the gate stack comprising an electrode material and a gate dielectric;
• a stack of channel material layers extending through the gate stack between the first and second terminals, wherein the channel material layers comprise a metal and a chalcogen, the gate dielectric is in first and second layers between the channel material layers and the electrode material, the first layers are under corresponding ones of the channel material layers, and the second layers are over the corresponding ones of the channel material layers;
• and
• a plurality of interface layers between the first layers and the corresponding ones of the channel material layers, the interface layers comprising phosphorus.

A method, comprising:

• depositing a template layer over a substrate;
• depositing a first metal on the template layer;
• patterning a mask layer over the template layer, wherein portions of the template layer are exposed in openings of the mask layer;
• forming a first dielectric layer on the first metal, the first dielectric layer comprising a second metal in a first composition;
• forming a channel material layer on the first dielectric layer, the channel material layer comprising a chalcogen and a third metal;
• and
• forming a second dielectric layer on the channel material layer, the second dielectric layer having the first composition.