Sha3 core for lattice-based cryptography
OwnerRobert Primas, Manoj Sastry +2inventors
InventorsRobert Primas, Manoj Sastry, Archisman Ghosh, Santosh Ghosh
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Abstract
Techniques for accelerating Keccak/SHA3 are described. In some examples, Keccak accelerator circuitry that includes block transformation circuitry to perform rounds of a block permutation function, wherein the block transformation circuitry include an internal state storage is coupled to a combined load/store buffer, wherein the combined load/store buffer is to be loaded with data to be used as input data to the block permutation function and is to store data output from the Keccak accelerator circuitry.
Claims20
An apparatus comprising:
- Keccak accelerator circuitry including block transformation circuitry to perform rounds of a block permutation function, the block transformation circuitry including an internal state storage;
- and
- a combined load/store buffer coupled to the Keccak accelerator circuitry, wherein the combined load/store buffer is to be loaded with data to be used as input data to the block permutation function and is to store data output from the Keccak accelerator circuitry.
An apparatus comprising:
- at least one processor core to handle one or more SHA3 instructions;
- Keccak accelerator circuitry including block transformation circuitry to perform rounds of a block permutation function in response to one or more of the SHA3 instructions, the block transformation circuitry including an internal state storage;
- and
- a combined load/store buffer coupled to the Keccak accelerator circuitry, wherein the combined load/store buffer is to be loaded with data to be used as input data to the block permutation function and is to store data output from the Keccak accelerator circuitry.
Dependencies are inferred from the claim text.