Bias voltage generators

A bias voltage generator, comprising:

• a first bias voltage generating circuit, configured for generating a first bias voltage;
• and
• a second bias voltage generating circuit, configured for generating a second bias voltage,
• wherein the first bias voltage generating circuit comprises:
• a first bias circuit, comprising a first transistor and a first current source;
• and
• a first amplifier circuit, configured for generating the first bias voltage according to an input common mode voltage and a first feedback voltage from the first transistor,
• wherein the first transistor comprises a first terminal coupled to a first supply voltage, a second terminal coupled to a first terminal of the first current source, and a third terminal coupled to the output terminal of the first amplifier circuit and configured for outputting the first bias voltage, and
• wherein the second bias voltage generating circuit comprises:
• a second bias circuit, comprising a second transistor and a second current source;
• and
• a second amplifier circuit, configured for generating the second bias voltage according to the input common mode voltage and a second feedback voltage from the second transistor,
• wherein the second transistor comprises a first terminal coupled to a ground voltage, a second terminal coupled to a first terminal of the second current source, and a third terminal coupled to the output terminal of the second amplifier circuit and configured for outputting the second bias voltage, and
• wherein a second terminal of the first current source is coupled to the ground voltage and a second terminal of the second current source is coupled to the first supply voltage.

A bias voltage generator, comprising:

• a first bias voltage generating circuit, configured for generating a first bias voltage;
• and
• a second bias voltage generating circuit, configured for generating a second bias voltage,
• wherein the first bias voltage generating circuit comprises:
• a first bias circuit, comprising a first transistor and a first current source;
• a first amplifier circuit, configured for generating the first bias voltage according to an input common mode voltage and a first feedback voltage from the first transistor;
• and
• a first output isolation circuit, comprising a first circuit and a second circuit,
• wherein the first transistor comprises a first terminal coupled to a first supply voltage, a second terminal coupled to a first terminal of the first current source, and a third terminal coupled to the first output isolation circuit, and
• wherein the second bias voltage generating circuit comprises:
• a second bias circuit, comprising a second transistor and a second current source;
• a second amplifier circuit, configured for generating the second bias voltage according to the input common mode voltage and a second feedback voltage from the second transistor;
• and
• a second output isolation circuit, comprising a third circuit and a fourth circuit,
• wherein the second transistor comprises a first terminal coupled to a ground voltage, a second terminal coupled to a first terminal of the second current source, and a third terminal coupled to the second output isolation circuit,
• wherein a second terminal of the first current source is coupled to the ground voltage and a second terminal of the second current source is coupled to the first supply voltage, and
• wherein the second circuit is a replica of the first circuit and the fourth circuit is a replica of the third circuit, or
• wherein the number of transistors in the second circuit is a multiple of the number of transistors in the first circuit, the number of transistors in the fourth circuit is a multiple of the number of transistors in the third circuit.