Semiconductor 3d structure generating device and operation method thereof

A method of generating a semiconductor 3D structure, the method comprising:

• receiving, from an external measuring device, a first input optical critical dimension (OCD) spectrum with respect to a first semiconductor pattern on a semiconductor wafer;
• generating, based on the first input OCD spectrum, a first 3D structure corresponding to the first semiconductor pattern;
• receiving, from the external measuring device, a second input OCD spectrum with respect to a second semiconductor pattern on the semiconductor wafer;
• and
• generating, based on the second input OCD spectrum and the first 3D structure, a second 3D structure corresponding to the second semiconductor pattern, and
• wherein the first semiconductor pattern is formed through a first process with respect to the semiconductor wafer, and
• wherein the second semiconductor pattern is formed through a second process performed after the first process with respect to the semiconductor wafer.

A semiconductor 3D structure generating device comprising:

• a structure value extracting module configured to (i) receive, from an external measuring device, a first input optical critical dimension (OCD) spectrum with respect to a first semiconductor pattern on a semiconductor wafer and (ii) extract a plurality of first input structure values based on the first input OCD spectrum;
• a candidate database generating module configured to, based on the plurality of first input structure values, generate a first candidate database including information on a plurality of first candidate structures corresponding to the first semiconductor pattern;
• a 3D structure selecting module configured to determine, among the plurality of first candidate structures of the first candidate database, a first candidate structure corresponding to (i) the first input OCD spectrum and (ii) the plurality of first input structure values;
• and
• a 3D structure modeling module configured to generate a first 3D structure corresponding to the first semiconductor pattern by simulating the first candidate structure.