User mode direct data access to non-volatile memory express device via kernel-managed queue pair

A computing system, comprising:

• a processor system;
• and
• a computer-readable storage medium that stores computer-executable instructions that are executable by the processor system to at least:
• identify a mapping of a Non-Volatile Memory Express (NVMe) queue pair, into a user mode address space, the NVMe queue pair comprising a submission queue (SQ) and a completion queue (CQ), and the NVMe queue pair having been mapped into the user mode address space by a kernel mode NVMe driver;
• submit an NVMe command to an NVMe device, including:
• write an SQ entry to the SQ of the NVMe queue pair;
• and
• ring an SQ doorbell register via a system call to the kernel mode NVMe driver, wherein, based on receiving the system call from a user mode component, the kernel mode NVMe driver validates that the user mode component is accessing a valid range of logical block addresses at the NVMe device;
• poll the CQ of the NVMe queue pair;
• and
• identify a CQ entry based on the polling.

A method, implemented in a computing system that includes a processor system, comprising:

• within a kernel mode context in the computing system:
• mapping a memory buffer into a user mode address space, the memory buffer enabling data transfer with a Non-Volatile Memory Express (NVMe) device via direct memory access (DMA);
• mapping a first NVMe queue pair, which comprises a first submission queue (SQ) and a first completion queue (CQ), into the user mode address space, the first NVMe queue pair enabling a user mode component to submit a command to the NVMe device;
• enabling the user mode component to ring a doorbell at the NVMe device, including exposing a system call to the user mode component;
• and
• based on receiving the system call from the user mode component,
• validating that the user mode component is accessing a valid range of logical block addresses at the NVMe device;
• and
• processing a first NVMe command using a second NVMe queue pair, which comprises a second SQ and a second CQ;
• and
• within a user mode context in the computing system:
• identifying the first NVMe queue pair;
• submitting a second NVMe command to the NVMe device, including,
• writing an SQ entry to the first SQ;
• and
• ringing an SQ doorbell register via the system call;
• poll the first CQ;
• and
• identifying a CQ entry based on the polling.