Scannable multibit self-gating flip-flop system

A method for self-gating a flip-flop circuit, comprising:

• generating an enable output based on input data signals using a front-end circuit;
• receiving the enable output at a latch circuit;
• generating a gated clock signal using an output driver circuit coupled to the latch circuit;
• providing the gated clock signal to the flip-flop circuit;
• and
• feeding back a signal from the output driver circuit to the front-end circuit to prevent hold violations.

A multibit flip-flop circuit, comprising:

• a front-end circuit configured to process multiple input data signals and generate an enable output;
• a latch circuit coupled to the front-end circuit and configured to receive the enable output;
• a clock generation circuit configured to generate clock signals;
• an output driver circuit coupled to the latch circuit and the clock generation circuit, the output driver circuit configured to generate a gated clock signal;
• and
• multiple flip-flops coupled to the output driver circuit and configured to receive the gated clock signal.