Equal probability dynamic element matching
AssigneeAvago Technologies International Sales Pte. Limited
InventorsKoon Lun Wong, Chi-Hung Lin
Life of this patent
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Abstract
Equal probability dynamic element matching functionality for use in various types of integrated circuits (e.g., communications circuits, etc.). The equal probability dynamic element matching functionality generally includes arranging circuit elements in a loop, and using both a pointer and a random number having a binary value to provide equal selection of circuit elements in the loop over time. The equal probability dynamic element matching functionality can be used to improve performance and durability of various types of integrated circuits.
Claims20
An integrated circuit, comprising:
- a digital-to-analog converter circuit;
- memory comprising instructions executable to implement an element matching function associated with the digital-to-analog converter circuit;
- and
- processing circuitry configured to execute the instructions in the memory to implement the element matching function by:
- arranging elements of the digital-to-analog converter circuit in a loop;
- initiating a pointer that is used to select one of the elements of the digital-to-analog converter circuit as part of the element matching function such that the pointer has a first value associated with a first element of the elements of the digital-to-analog converter circuit;
- initiating a random number that is used to increment the pointer and has a binary value;
- during a first time period, resetting the random number with equal probability that the binary value is reset to on and to off;
- during the first time period, incrementing the pointer to a second value associated with a second element of the elements of the digital-to-analog converter circuit arranged adjacent to the first element in the loop responsive to determining that the binary value has been reset to on during the first time period;
- during a second time period, resetting the random number with equal probability that the binary value is reset to on and to off;
- and
- during the second time period, leaving the pointer unchanged responsive to determining that the binary value has been reset to off during the second time period.
A method for element matching in an integrated circuit comprising a digital-to-analog converter, the method comprising:
- arranging elements of the digital-to-analog converter circuit in a loop;
- initiating a pointer used to select one of the elements of the digital-to-analog converter circuit such that the pointer has a first value associated with a first element of the elements of the digital-to-analog converter circuit;
- initiating a random number that is used to increment the pointer and has a binary value;
- during a first time period, resetting the random number such that there is equal probability that the binary value is reset to on and to off during the first time period;
- during the first time period, incrementing the pointer to a second value associated with a second element of the elements of the digital-to-analog converter circuit arranged adjacent to the first element in the loop responsive to determining that the binary value has been reset to off during the first time period;
- during a second time period, resetting the random number such that there is equal probability that the binary value is reset to on and to off during the second time period;
- and
- during the second time period, leaving the pointer unchanged responsive to determining that the binary value has been reset to on during the second time period.
A non-transitory computer-readable storage medium comprising instructions stored thereon that, when executed by processing circuitry, cause the processing circuitry to:
- arrange elements of a digital-to-analog converter circuit in a loop;
- initiate a pointer used to select one of the elements of the digital-to-analog converter circuit such that the pointer has a first value associated with a first element of the elements of the digital-to-analog converter circuit;
- initiate a random number that is used to increment the pointer and has a binary value;
- during a first time period, reset the random number such that there is equal probability that the binary value is reset to on and to off during the first time period;
- during the first time period, increment the pointer to a second value associated with a second element of the elements of the digital-to-analog converter circuit arranged adjacent to the first element in the loop responsive to determining that the binary value has been reset to on during the first time period;
- during a second time period, reset the random number such that there is equal probability that the binary value is reset to on and to off during the second time period;
- and
- during the second time period, leave the pointer unchanged responsive to determining that the binary value has been reset to off during the second time period.
Dependencies are inferred from the claim text.