Differential and single-ended relaxation oscillators for physical unclonable function (puf) circuits and for providing clocks to multiple dies

An integrated circuit device, comprising:

• a clock generator circuit comprising a relaxation oscillator circuit configured to generate a clock signal, wherein the relaxation oscillator circuit comprises a resistor circuit and a capacitor circuit, and wherein one or more of the resistor circuit and the capacitor circuit is distributed amongst multiple dies the integrated circuit device.

A method, comprising:

• enabling a clock generator circuit that comprises a relaxation oscillator circuit in a first one of multiple dies of an integrated circuit device, and a resistive/capacitive (RC) circuit distributed amongst the multiple dies, wherein the RC circuit is configurable in first and second configurations to provide respective first and second RC time constants;
• and
• configuring the RC circuit in the first configuration for a first period of time and configuring the RC circuit in the second configuration for a second period of time such that the clock generator circuit generates first and second time-multiplexed clocks having frequencies that are based in part on the respective first and second RC time constants.