Cell operation circuit
AssigneeFerroelectric Memory GmbH
InventorsFabio Tassan Caser, Luigi Paone, Johannes Ocker
Life of this patent
Estimating the term…
Abstract
A cell operation circuit for operating a set of memory elements comprises: an access circuitry comprising a first input terminal and a second input terminal and being configured to receive a first operation voltage at the first input terminal and to receive a second operation voltage at second input terminal to access a first memory element of the set; a control circuitry configured to provide a protection voltage, to which a second memory element of the set is exposed, when the first memory element is accessed by the access circuitry, wherein the protection voltage is between the first operation voltage and the second operation voltage.
Claims20
A cell operation circuit for operating a set of memory elements, the cell operation circuit comprising:
- an access circuitry comprising a first input terminal and a second input terminal and being configured to receive a first operation voltage at the first input terminal and to receive a second operation voltage at a second input terminal to access a first memory element of the set;
- a control circuitry configured to provide a protection voltage, to which a second memory element of the set is exposed, when the first memory element is accessed by the access circuitry, wherein the protection voltage is between the first operation voltage and the second operation voltage.
The cell operation circuit of claim 21, wherein the control circuitry is configured to provide the protection voltage, to which the second memory element of the set is exposed, when the second memory element is further exposed to an access voltage, to which the first memory element is exposed.
The cell operation circuit of claim 32, wherein the access circuitry comprises an access node, at which the access voltage is developed based on a switching charge delivered by the first memory element.
The cell operation circuit of claim 43, wherein the access voltage is developed to one of a voltage level of the first operation voltage associated with a first memory state of the first memory element or a voltage level of the second operation voltage associated with a second memory state of the first memory element.
The cell operation circuit of claim 1312, further comprising a first plateline, wherein to access the first memory element includes to provide the programming voltage, to which the first memory element is exposed via the first plateline.
The cell operation circuit of claim 1413, further comprising a second plateline via which the second memory element is exposed to the protection voltage, wherein the first plateline and the second plateline are disposed over each other.
A cell operation circuit for operating a set of memory elements, the cell operation circuit comprising:
- an access circuitry comprising an access node, wherein the access circuitry is configured to access a first memory element of the set based on an access voltage at the access node, wherein the access voltage is at one of a first voltage level associated with a first memory state of the first memory element or a second voltage level associated with a second memory state of the first memory element;
- a control circuitry configured to provide a protection voltage, to which a second memory element of the set is exposed, when the access circuitry is configured to access a first memory element of the set, wherein the protection voltage is between the first voltage level and the second voltage level.
A cell operation circuit for operating a set of memory elements, the cell operation circuit comprising:
- an access circuitry comprising an access node, wherein the access circuitry is configured to, in an access operation mode, access a first memory element of the set based on an access voltage at the access node;
- a control circuitry configured provide a protection voltage, to which a second memory element of the set is exposed, wherein the protection voltage is, in a first phase of the access operation mode, at a first level and, in a second phase of the access operation mode, at a second level different from the first level.
Dependencies are inferred from the claim text.