Responsiveness when looping on speculative atomic memory updates

A computer system comprising:

• a processor set;
• one or more computer-readable storage media;
• and
• program instructions stored on the one or more computer-readable storage media to cause the processor set to perform operations comprising:
• determining that a conditionally atomic updating instruction has encountered a fail condition;
• determining that a fail loop of the conditionally atomic updating instruction has occurred;
• in response to determining that the conditionally atomic updating instruction has encountered the fail condition and that the fail loop has occurred, increasing a count that each cross-interrogation request (XI) instruction rejection contributes toward an XI rejection count that is compared to a threshold;
• and
• in response to the XI rejection count satisfying the threshold, performing a selfish store mitigation operation, wherein the selfish store mitigation operation blocks a thread or core responsible for the fail loop from inserting a new instruction into an instruction pipeline and flushes non-completed instructions of the thread or core from the instruction pipeline.

A method comprising:

• determining that a conditionally atomic updating instruction has encountered a fail condition;
• determining that a fail loop of the CS instruction has occurred;
• in response to determining that the CS instruction has encountered the fail condition and that the fail loop has occurred, increasing a retry rate of each rejected XI instruction, wherein each XI instruction rejection contributes toward an XI rejection count that is compared to a threshold;
• and
• in response to the XI rejection count satisfying the threshold, performing a selfish store mitigation operation, wherein the selfish store mitigation operation blocks a thread or core responsible for the fail loop from inserting a new instruction into an instruction pipeline and flushes non-completed instructions of the thread or core from the instruction pipeline.