Biased Indirect Control Transfer Prediction
AssigneeApple Inc.
InventorsMuawya M. Al-Otoom, Pruthivi Vuyyuru, Andrew H. Lin, Ian D. Kountanis
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Abstract
A processor may include an indirect control transfer prediction circuit. During fetch of an indirect control transfer instruction from memory to an instruction cache of the processor, the indirect control transfer prediction circuit may predict whether the indirect control transfer instruction is biased. Responsive to a prediction that the indirect control transfer instruction is biased, the indirect control transfer prediction circuit may cause the indirect control transfer instruction to be executed as an unconditional direct control transfer instruction according to the predicted bias.
Claims21
-20. (canceled)
A processor, comprising:
- a prediction circuit configured to predict respective conditions for individual conditional instructions according to one or more previous executions of the individual conditional instructions, wherein the predicted conditions individually comprise a biased condition or an unbiased condition, and wherein the biased condition indicates that the respective condition is always true or always false;
- and
- a prefetch circuit configured to:
- prefetch an indirect control transfer instruction from memory;
- and
- perform, responsive to a prediction by the prediction circuit, that the indirect control transfer instruction is biased:
- recode the prefetched indirect control transfer instruction as an unconditional direct control transfer instruction according to the predicted bias;
- and
- store the unconditional direct control transfer instruction in the instruction cache.
A method, comprising:
- predicting, by a prediction circuit of a processor, respective conditions for individual conditional instructions according to one or more previous executions of the individual conditional instructions, wherein the predicted conditions individually comprise a biased condition or an unbiased condition, and wherein the biased condition indicates that the respective condition is always true or always false;
- and
- performing, by a prefetch circuit of the processor:
- prefetching an indirect control transfer instruction from memory;
- and
- performing, responsive to a prediction by the prediction circuit, that the indirect control transfer instruction is biased:
- recoding the prefetched indirect control transfer instruction as an unconditional direct control transfer instruction according to the predicted bias;
- and
- storing the unconditional direct control transfer instruction in an instruction cache of the processor.
A system, comprising:
- a memory configured to store a plurality of instructions;
- and
- a processor comprising:
- a prediction circuit configured to predict respective conditions for individual conditional instructions according to one or more previous executions of the individual conditional instructions, wherein the predicted conditions individually comprise a biased condition or an unbiased condition, and wherein the biased condition indicates that the respective condition is always true or always false;
- and
- a prefetch circuit configured to:
- prefetch an indirect control transfer instruction from memory;
- and
- perform, responsive to a prediction by the prediction circuit, that the indirect control transfer instruction is biased:
- recode the prefetched indirect control transfer instruction as an unconditional direct control transfer instruction according to the predicted bias;
- and
- store the unconditional direct control transfer instruction in an instruction cache.
Dependencies are inferred from the claim text.