Processor for performing flow control of multiple types of instructions and method for performing flow control of multiple types of instructions in processor

A processor for performing flow control of multiple types of instructions, comprising:

• a first pipeline processing circuit, configured to receive the multiple types of instructions from outside of the processor and handle a first-type instruction among the multiple types of instructions;
• a second pipeline processing circuit, coupled to the first pipeline processing circuit, configured to receive the multiple types of instructions from the first pipeline processing circuit and handle a second-type instruction among the multiple types of instructions;
• a first flow control unit, coupled to the first pipeline processing circuit, configured to receive a third-type instruction among the multiple types of instructions from the first pipeline processing circuit and generate control information according to the third-type instruction;
• and
• a second flow control unit, coupled to the second pipeline processing circuit, configured to receive the third-type instruction from the second pipeline processing circuit and generate the control information according to the third-type instruction;
• wherein the first pipeline processing circuit obtains the control information from the first flow control unit, the second pipeline processing circuit obtains the control information from the second flow control unit, and the control information generated by the first flow control unit is identical to the control information generated by the second flow control unit.