Esd (electrostatic discharge) verification for large io (input/output) arrays

A test system comprising:

• a memory device to store a circuit definition having an array of IO (input/output) connections to be verified, the IO connections each having an ESD (electrostatic discharge) protection circuit and ESD victim circuits coupled to a power clamp;
• and
• a processor device coupled to the memory device, the processor to perform circuit verification on the circuit definition, including to generate an ESD verification model IO instance with the ESD protection circuit and the ESD victim circuits as separate cells at a same level of verification hierarchy, verify the model IO instance at a worst case connection test case to a power clamp to verify ESD protection within the model IO instance, and generate an ESD verification model IO array from multiple verified IO instances, the model IO array to verify ESD protection between the verified model IO instances.