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US 2026/0173938 A1Published application
Method of manufacturing a semiconductor package and such semiconductor package
AssigneeNexperia B.V.
InventorsJia Yunn Ting, Ting Wei Chang, Wai Wai Lee, Regnerus Hermannus Poelma
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Abstract
A method of manufacturing a semiconductor package assembly and a semiconductor package is provided, with integral electrically conductive layers seeded on the first die side and on the part of the at least one lead frame terminal.
Claims18
A method of manufacturing a semiconductor package assembly comprising the steps of:
- a) providing a lead frame having a first frame side and a second frame side opposite to the first frame side and at least one lead frame terminal;
- b) providing at least one semiconductor die structure having a first die side and a second die side opposite to the first die side with the second die side on the first frame side of the lead frame;
- c) encapsulating at least part of the lead frame, the semiconductor die structure and the at least one lead frame terminal with a molding resin;
- d) removing a portion of the molding resin thereby exposing at least part of the first die side of at least one die structure;
- e) providing an electrical connection layer between the exposed first die side and the exposed part of the at least one lead frame terminal, wherein step e) comprises at least the sub-steps of:
- e1) applying a seeding layer of a first electrically conductive material on the first die side and on the part of the at least one lead frame terminal;
- and
- e2) applying a cover layer of a second electrically conductive material as a finish of the electrical connection layer.
5 more elements
Dependencies are inferred from the claim text.