Ultra-low inductance fast switching packaging design for wide bandgap power modules

Abstract

The present disclosure relates to a device that includes a plurality of electrically conductive layers, a plurality of dielectric layers, and at least two recesses positioned in at least one electrically conductive layer, each recess configured to receive an electronic element. Further, the electrically conductive layers are positioned parallel to a reference plane, the dielectric layers are positioned parallel to the reference plane, and the electrically conductive layers and the dielectric layers are positioned to form a stack that is aligned symmetrically in the direction of a reference axis that is perpendicular to the reference plane and in a substantially circular arrangement around the reference axis.

Dependencies are inferred from the claim text.