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US 2026/0173525 A1Published application
Layered semiconductor structures and methods for fabricating layered semiconductor structures
AssigneeNokia Networks France
InventorsJean DECOBERT, Claire BESANCON
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Abstract
A layered semiconductor structure comprises: an InP on Silicon, InPoSi, substrate. The InPoSi substrate comprises: a silicon substrate; a silica layer on the silicon substrate; and an InP seed layer on the silica layer; a stack of III-V layers on the InPoSi substrate. The stack of III-V layers comprises a buffer layer above the InP seed layer. The buffer layer is made of InyAl1-yAs, y being smaller than or equal to 0.53.
Claims15
A layered semiconductor structure comprising:
- an InP on Silicon, InPoSi, substrate, wherein the InPoSi substrate comprises:
- a silicon substrate;
- a silica layer on the silicon substrate;
- and
- an InP seed layer on the silica layer;
- a stack of III-V layers on the InPoSi substrate,
- wherein the stack of III-V layers comprises a buffer layer above the InP seed layer;
- wherein the buffer layer is made of InyAl1-yAs, y being smaller than or equal to 0.53.
5 more elements
A method of fabricating a layered semiconductor structure, the method comprising:
- providing an InP on Silicon, InPoSi, substrate comprising a silicon substrate, a silica layer on the silicon substrate and an InP seed layer on the silica layer;
- depositing by epitaxy a stack of III-V layers including a buffer layer above the InP seed layer;
- wherein the buffer layer is made of InyAl1-yAs, y being smaller than or equal to 0.53.
Dependencies are inferred from the claim text.