Ctdsm with high tolerance to clock frequency variation

A device, comprising:

• a continuous-time delta sigma modulator (CTDSM), including:
• an integrator having an input and an output;
• a quantizer having an input and an output, the input of the quantizer coupled to the output of the integrator;
• a first filter having one or more taps, an input, and an output, the input of the first filter coupled to the output of the quantizer;
• a first digital-to-analog converter (DAC) having an input and an output, the input of the first DAC coupled to the output of the first filter, and the output of the first DAC coupled to the input of the quantizer;
• a second filter having one or more taps, an input, and an output, the input of the second filter coupled to the output of the quantizer;
• a second DAC having an input and an output, the input of the second DAC coupled to the output of the second filter, and the output of the second DAC coupled to the input of the integrator;
• and
• a third filter having an input coupled to the output of the quantizer;
• a digital signal processor (DSP) coupled to the CTDSM;
• a third DAC coupled to the DSP;
• and
• a speaker coupled to the DAC.

A continuous-time delta sigma modulator (CTDSM), comprising:

• a first combination block having an input and an output;
• a first integrator having an input and an output, the input of the first integrator coupled to the output of the first combination block;
• a second combination block having first and second inputs and an output, the first input of the second combination block coupled to the output of the first integrator;
• a second integrator having an input and an output, the input of the second integrator coupled to the output of the second combination block;
• a third combination block having first and second inputs and an output, the first input of the third combination block coupled to the output of the second integrator;
• a quantizer having an input and an output, the input of the quantizer coupled to the output of the third combination block;
• a multi-tap finite impulse response (FIR) filter having an input and an output, the input of the FIR filter coupled to the output of the quantizer;
• a first digital-to-analog converter (DAC) having an input and an output, the input of the first DAC coupled to the output of the FIR filter, and the output of the first DAC coupled to the input of the first combination block;
• a first filter including one or more taps, an input, and an output, the input of the first filter coupled to the output of the quantizer;
• a second DAC having an input and an output, the input of the second DAC coupled to the output of the first filter, and the output of the second DAC coupled to the second input of the second combination block;
• a second filter including one or more taps, an input, and an output, the input of the second filter coupled to the output of the quantizer;
• and
• a third DAC having an input and an output, the input of the third DAC coupled to the output of the second filter, and the output of the third DAC coupled to the second input of the third combination block.