Method and apparatus for monitoring switching unit in solid-state circuit breaker

An apparatus for monitoring a switching unit in a solid-state circuit breaker, the switching unit comprising a first group of power devices, a first electrode of each power device of the first group of power devices being electrically connected to a first node, and a second electrode of each power device of the first group of power devices being electrically connected to a second node, the apparatus comprising:

• at least one processor;
• and
• at least one memory coupled to the at least one processor and storing instructions for execution by the at least one processor, the instructions, when executed by the at least one processor, causing the apparatus to perform acts comprising:
• during a period in which a main circuit current flows from the first electrode to the second electrode of the first group of power devices in a first direction, causing a first turn-off voltage to be applied to a gate of each power device of the first group of power devices in a first time period;
• in response to the application of the first turn-off voltage, obtaining a voltage across a first capacitive element, wherein the first capacitive element and a first resistive element are connected in series between the first node and the second node;
• and
• based on the voltage across the first capacitive element, determining whether a turn-off function of each power device of the first group of power devices is normal when the main circuit current flows therethrough in the first direction.

A solid-state circuit breaker comprising:

• a switching unit comprising a first group of power devices and a second group of power devices, wherein a first electrode of each power device of the first group of power devices is electrically connected to a first node, a second electrode of each power device of the first group of power devices is electrically connected to a second node, a first electrode of each power device of the second group of power devices is electrically connected to a third node, a second electrode of each power device of the second group of power devices is electrically connected to a fourth node, and the fourth node is electrically connected to the second node;
• a first capacitive element and a first resistive element connected in series between the first node and the second node;
• a second capacitive element and a second resistive element connected in series between the third node and the fourth node;
• a shunt resistor connected between the second node and the fourth node;
• and
• a processor configured to perform acts comprising:
• during a period in which a main circuit current flows from the first electrode to the second electrode of the first group of power devices in a first direction, causing a first turn-off voltage to be applied to a gate of each power device of the first group of power devices in a first time period;
• in response to the application of the first turn-off voltage, obtaining a voltage across a first capacitive element;
• and
• based on the voltage across the first capacitive element, determining whether a turn-off function of each power device of the first group of power devices is normal when the main circuit current flows therethrough in the first direction.