Memory read out circuit
AssigneeeMemory Technology Inc.
InventorsCHIA-FU CHANG, CHIA-CHING LI
Life of this patent
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Abstract
A memory read out circuit includes a sensing module, an output module, and a voltage boost unit. The sensing module is configured to sense a data stored in a memory cell to generate an output data signal according to a first supply voltage. The output module includes buffers and configured to output the output data signal stably. The voltage boost unit is configured to provide the first supply voltage to at least one of the buffers before the sensing module begins to sense the data, and provide a second supply voltage greater than the first supply voltage to the at least one of the buffers when the sensing module senses the data so as to raise a reading speed of the memory read out circuit.
Claims15
A memory read out circuit, comprising:
- a sensing module connected to a first supply voltage, configured to sense a data stored in a memory cell to generate an output data signal according to a first enable signal;
- an output module coupled to the sensing module, comprising a plurality of buffers and configured to output the output data signal stably;
- and
- a voltage boost unit, configured to provide the first supply voltage to at least one of the plurality of buffers before the sensing module begins to sense the data, and provide a second supply voltage greater than the first supply voltage to the at least one of the plurality of buffers when the sensing module senses the data so as to raise a reading speed of the memory read out circuit.
Dependencies are inferred from the claim text.