Optimizing fpga resource utilization with dsp-based mask operators
AssigneeMicrosoft Technology Licensing, LLC
InventorMichael MILKOV
Life of this patent
Estimating the term…
Abstract
Optimization of field programmable gate array (FPGA) resource utilization using digital signal processor (DSP) blocks to implement a DSP-based mask operator is provided. A first vector is divided into a first n-bit subgroup and a second vector is divided into a second n-bit subgroup. A mask is applied to the first n-bit subgroup to generate a first masked vector and the mask is applied to the second n-bit subgroup to generate a second masked vector. The second masked vector is subtracted from the first masked vector to generate a result and the generated result is outputted. If a value of the result is zero, the first vector subgroup after applying the mask and the second vector subgroup after applying the mask are determined to be the same.
Claims20
A system comprising:
- a field-programmable gate array (FPGA) comprising digital signal processor (DSP) blocks to implement a DSP-based mask operator, the DSP blocks configured to:
- divide a first vector into a first n-bit subgroup and a second vector into a second n-bit subgroup;
- apply a mask to the first n-bit subgroup to generate a first masked vector and apply the mask to the second n-bit subgroup to generate a second masked vector;
- subtract the second masked vector from the first masked vector to generate a result;
- and
- output the generated result.
A method comprising:
- dividing a first vector into a first n-bit subgroup and a second vector into a second n-bit subgroup;
- applying, by digital signal processor (DSP) blocks in a field-programmable gate array (FPGA), a mask to the first n-bit subgroup to generate a first masked vector and applying the mask to the second n-bit subgroup to generate a second masked vector;
- subtracting the second masked vector from the first masked vector to generate a result;
- and
- outputting the generated result.
A special purpose integrated circuit (IC) comprising digital signal processor (DSP) blocks to implement a DSP-based mask operator, the DSP blocks configured to:
- divide a first vector into a first n-bit subgroup and a second vector into a second n-bit subgroup;
- apply a mask to the first n-bit subgroup to generate a first masked vector and apply the mask to the second n-bit subgroup to generate a second masked vector;
- compare the second masked vector with the first masked vector;
- and
- output a result of the comparison.
Dependencies are inferred from the claim text.