Compensation scheme for analog in-memory matrix multiplication
AssigneeInternational Business Machines Corporation
InventorsAbhairaj Singh, Pritish Narayanan, Manuel Le Gallo-Bourdeau, Abu Sebastian
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AssigneeInternational Business Machines Corporation
InventorsAbhairaj Singh, Pritish Narayanan, Manuel Le Gallo-Bourdeau, Abu Sebastian
Estimating the term…
Computing devices and methods are provided for executing analog in-memory computing for matrix vector multiplication. Values of a matrix are mapped to conductance values of a memory crossbar array. Analog voltage values of an activation vector are inputted to the memory cells of the memory crossbar array. Non-linear output values are generated, via the memory cells, from the analog voltage values and the mapped conductance values. Time varying voltage values are also generated via the memory cells of the memory crossbar array. The time varying voltage values are used to linearize the analog non-linear output values into analog linear output values and convert the analog linear output values to digital linear output values to compensate for potential inaccuracies of the non-linear output values.
A computing device comprising:
A computer-implemented method comprising:
A computer program product comprising:
A computing device comprising:
A method comprising:
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