Asynchronous finite state machine circuit, corresponding method of operation and integrated circuit
AssigneeSTMicroelectronics International N.V.
InventorsFrancesco Battini, Roberta Priolo, Enea Dimroci
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AssigneeSTMicroelectronics International N.V.
InventorsFrancesco Battini, Roberta Priolo, Enea Dimroci
Estimating the term…
An embodiment asynchronous finite state machine (AFSM) circuit includes a first state register configured to output a first state acknowledgment signal in response to the AFSM circuit transitioning to a first state, a second state register configured to output a second state acknowledgment signal in response to the AFSM circuit transitioning to a second state, a first acknowledgement branch configured to convey the second state acknowledgment signal from the second state register to the first state register, a second acknowledgement branch configured to convey the first state acknowledgment signal from the first state register to the second state register, and transition logic circuitry. The transition logic circuitry is configured to: interrupt the first acknowledgement branch in response to a first transition signal indicating a transition, of the AFSM circuit, from the first state to the second state; and interrupt the second acknowledgement branch in response to a second transition signal indicating a transition, of the AFSM circuit, from the second state to the first state.
An asynchronous finite state machine (AFSM) circuit comprising:
A method of operating an asynchronous finite state machine (AFSM) circuit, the method comprising:
An integrated circuit implementing an asynchronous finite state machine (AFSM), the circuity comprising:
Dependencies are inferred from the claim text.