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AssigneeAdvanced Micro Devices, Inc.
InventorsCorbin Andrew Robeck, Keith Lowery, Rene Willibrordus van Oostrum
Estimating the term…
An apparatus and method for aligning execution of instructions of a given type with performance counter updates of a parallel data processing circuit. In various implementations, a computing system includes a processing circuit that executes instructions of a compiler that includes an alignment instrumentation tool. When executing the compiler, the processing circuit inserts a tagging instruction that provides identification of the instruction of a given type in source code and in hardware performance counters. In some implementations, the instructions of the given type include one or more of shared memory access instructions and conditional control flow instructions. The first processing circuit also inserts, in program order, a number of padding instructions that causes a number of clock cycles between execution of consecutive instructions of the given type to be equal to or greater than a periodic time interval of updating hardware performance counters.
An apparatus comprising:
A method, comprising:
A non-transitory computer readable medium comprising program instructions executable by circuitry to:
Dependencies are inferred from the claim text.