Power regulator for digital circuitry
AssigneeArm Limited
InventorsRainer HERBERHOLZ, El Mehdi BOUJAMAA, Stuart James AITKEN
Life of this patent
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Abstract
An apparatus for controlling the voltage supply of one or more digital circuits, the one or more digital circuits having a functional clock unit to provide a clock signal to the one or more digital circuits, the apparatus including: a first feedback generation unit to generate a first feedback signal based on a comparison between a current number of gate delays corresponding to a current clock signal and a target number of gate delays; and a power regulator unit to adjust the power delivery to the one or more digital circuits based on the first feedback signal.
Claims20
An apparatus for controlling power delivery to one or more digital circuits, the one or more digital circuits having a functional clock unit to provide a clock signal to the one or more digital circuits, the apparatus comprising:
- a first feedback generation unit to generate a first feedback signal based on a comparison between a current number of gate delays corresponding to a current clock signal and a target number of gate delays;
- and
- a power regulator unit to adjust the power delivery to the one or more digital circuits based on the first feedback signal.
A computer-implemented method of controlling power delivery to one or more digital circuits, the one or more digital circuits having a functional clock unit to provide a clock signal to the one or more digital circuits, the method comprising:
- generating a first feedback signal based on a comparison between a current number of gate delays corresponding to a current clock signal and a target number of gate delays;
- and
- adjusting the power delivery to the one or more digital circuits based on the first feedback signal.
A system comprising:
- a system on chip comprising one or more digital circuits and a functional clock unit to provide a clock signal to the one or more digital circuits;
- a power stage comprising a power supply circuit to process power delivery to the system on chip;
- a first feedback generation unit to generate a first feedback signal based on a comparison between a current number of gate delays corresponding to a current clock signal and a target number of gate delays;
- and
- a power regulator unit to adjust the power delivery to the one or more digital circuits based on the first feedback signal.
Dependencies are inferred from the claim text.