Semiconductor package
AssigneeSamsung Electronics Co., Ltd.
InventorsIN-JAE LEE, DONGOK KWAK, TAE-YOUNG LEE
Life of this patent
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Abstract
A semiconductor package may include a substrate, a semiconductor chip disposed on the substrate, electrically connected to the substrate, and having a connection pad at a surface of the semiconductor chip, a passive component disposed on the semiconductor chip, and a first conductive pattern extending from the connection pad to an outer side of the connection pad along the surface of the semiconductor chip and electrically connecting the semiconductor chip and the passive component, at least a portion of which is disposed between the semiconductor chip and the passive component.
Claims20
A semiconductor package, comprising:
- a substrate;
- a semiconductor chip disposed on the substrate, electrically connected to the substrate, and having a connection pad at a surface of the semiconductor chip;
- a passive component disposed on the semiconductor chip;
- and
- a first conductive pattern extending from the connection pad to an outer side of the connection pad, along the surface of the semiconductor chip, and electrically connecting the semiconductor chip and the passive component, at least a portion of which is disposed between the semiconductor chip and the passive component.
A semiconductor package, comprising:
- a substrate;
- a semiconductor chip disposed on the substrate, electrically connected to the substrate, and having a plurality of connection pads comprising a first connection pad and second connection pad at a surface of the semiconductor chip;
- a passive component disposed on the semiconductor chip, and having a first electrode and a second electrode;
- a first conductive pattern extending from the first connection pad to an outer side of the first connection pad along the surface of the semiconductor chip, wherein the first conductive pattern comprises a first pad region, at least a portion of which is disposed between the semiconductor chip and the first electrode, and a first connection region connecting the first pad region and the first connection pad, and electrically connecting the first connection pad and the first electrode;
- and
- a second conductive pattern extending from the second connection pad to an outer side of the second connection pad, along the surface of the semiconductor chip, wherein the second conductive pattern comprises a second pad region, at least a portion of which is disposed between the semiconductor chip and the second electrode, and a second connection region connecting the second pad region and the second connection pad, and electrically connecting the second connection pad and the second electrode.
A semiconductor package, comprising:
- a substrate;
- a plurality of semiconductor chips disposed on the substrate, electrically connected to the substrate, and having a plurality of connection pads at a surface of each corresponding semiconductor chip of the plurality of semiconductor chips, wherein each semiconductor chip of the plurality of semiconductor chips is stacked to be offset such that each connection pad of the plurality of connection pads at the surface of the corresponding semiconductor chip is exposed;
- a passive component disposed on a first semiconductor chip of the plurality of semiconductor chips;
- and
- a first conductive pattern extending from the connection pad of the first semiconductor chip to an outer side of the connection pad along a surface of the first semiconductor chip, and electrically connecting the first semiconductor chip and the passive component, at least a portion of which is disposed between the first semiconductor chip and the passive component.
Dependencies are inferred from the claim text.