Package method for paralleling power semiconductor devices

A semiconductor package comprising:

• a first lead, a second lead, a third lead, and a source pad;
• a first clip coupled to the first lead;
• a second clip coupled to the second lead;
• a first die coupled between the source pad and the first clip;
• and
• a second die coupled between the first clip and the second clip;
• wherein the first die has a gate, a drain, and a source that are connected in parallel with a gate, a drain, and a source of the second die;
• wherein the first clip is coupled to the drain of the first die and to the drain of the second die;
• wherein the gate of the first die and the gate of the second die are coupled to the third lead;
• and
• wherein the second clip further comprises a cutout that exposes a pad of the gate of the second die.

A semiconductor package comprising:

• a first drain lead coupled to a first clip;
• a second source lead coupled to a second clip;
• a first die comprising a drain coupled between a source pad and the first clip, the drain of the first die coupled to the first clip;
• and
• a second die comprising a drain coupled between the first clip and the second clip, the drain of the second die coupled to the first clip;
• wherein the first die has a first gate and the second die has a second gate;
• wherein the first gate and the second gate are electrically connected through a wirebond;
• and
• wherein the package is configured to decrease electromagnetic interference (EMI) in an inductor when coupled with the inductor.