Electronic chip packaging
AssigneeSTMicroelectronics International N.V.
InventorsVincent KNOPIK, Julien DIDION
Life of this patent
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Abstract
An electronic chip package includes terminals. At least one first terminal of the included terminals is configured to receive and/or deliver a power supply potential. At least one second terminal of the included terminals is configured to receive and/or deliver a reference potential. At least one third terminal of the included terminals is configured to receive and/or deliver a data signal. The at least one third terminal is arranged at the periphery of the package. The at least one first terminal is arranged more centrally in the package than the at least one third terminal.
Claims16
An electronic chip package, comprising:
- at least one first terminal configured to receive and/or deliver a power supply potential;
- at least one second terminal configured to receive and/or deliver a reference potential;
- and
- at least one third terminal configured to receive and/or deliver a data signal;
- wherein said at least one third terminal is arranged at a periphery of the package;
- and
- wherein said at least one first terminal is arranged more centrally in the package than said at least one third terminal.
An electronic chip package, comprising:
- a plurality of data terminals arranged at a periphery of the package;
- a plurality of ground terminals arranged between a central portion of the package and the periphery of the package;
- and
- at least one power supply terminal arranged at the central portion of the package and separated from the plurality of data terminals by one or more of the plurality of ground terminals.
Dependencies are inferred from the claim text.