Semiconductor chip and semiconductor stack structure including the same

A semiconductor chip comprising:

• a body having a front surface and a back surface;
• a through via extending through the front surface and the back surface;
• a back insulating structure on the back surface of the body and surrounding the through via, the back insulating structure comprising a back passivation layer, a back etch stop layer and a back bonding insulating layer, sequentially disposed on the back surface;
• and
• a back pad structure in the back insulating structure,
• wherein the back pad structure comprises:
• a plurality of first back pad patterns spaced apart from each other in a horizontal direction in the back passivation layer and spaced apart from the through via in the horizontal direction, and
• a second back pad pattern below the plurality of first back pad patterns and the back passivation layer, the second back pad pattern having a width and a thickness greater than a width and a thickness of each of the plurality of first back pad patterns.

A semiconductor stack structure comprising:

• a lower semiconductor chip;
• and
• an upper semiconductor chip stacked on and bonded to the lower semiconductor chip,
• wherein each of the lower semiconductor chip and the upper semiconductor chip comprises:
• a body having a front surface and a back surface;
• a through via extending through the front surface and the back surface;
• a back insulating structure on the back surface of the body and surrounding the through via, the back insulating structure comprising a back passivation layer, a back etch stop layer and a back bonding insulating layer, sequentially disposed on the back surface;
• and
• a back pad structure in the back insulating structure, the back pad structure comprising:
• a plurality of first back pad patterns spaced apart from each other in a horizontal direction in the back passivation layer and spaced apart from the through via in the horizontal direction, and
• a second back pad pattern below each of the plurality of first back pad patterns and the back passivation layer, the second back pad pattern having a width greater than a width of each of the plurality of first back pad patterns.