Method and apparatus for implementing finite field multiplication

An apparatus for performing finite field multiplication of a first bit string and a second bit string, wherein the first bit string represents coefficients of a first polynomial in a finite field GF(2n) (where n is a natural number), and the second bit string represents coefficients of a second polynomial in the finite field, comprising:

• at least one memory storing instructions;
• and
• at least one processor,
• wherein the at least one processor executes the instructions to:
• generate an LUT including products of the first bit string and each of bit strings of a predetermined size in the finite field,
• calculate, using the LUT, a third bit string, wherein the third bit string represents coefficients of a third polynomial, wherein the third polynomial is a product of the first polynomial and the second polynomial, and
• perform a modulo operation on the third bit string, wherein a dividend is the third bit string and a divisor is the irreducible polynomial of the finite field.