Low latency error detection and recovery mechanism for image signal processor
AssigneeQUALCOMM Incorporated
InventorsAakil Mahendra BAPNA, Abhijeet DEY, Vijayamanohar NAGARAJAN, Rahul GULATI, Joby ABRAHAM
Life of this patent
Estimating the term…
Abstract
A method for low latency error detection and recovery is described. The method includes monitoring a serial data stream received at an image signal processor (ISP). The method also includes detecting an error status packet in the serial data stream. The method further includes determining a recovery according to a decoded error type from the error status packet. The method also includes initiating the recovery in the ISP.
Claims20
A method for low latency error detection and recovery, the method comprising:
- monitoring a serial data stream received at an image signal processor (ISP);
- detecting an error status packet in the serial data stream;
- determining a recovery according to a decoded error type from the error status packet;
- and
- initiating the recovery in the ISP.
A method for low latency error detection and recovery, the method comprising:
- reading an error status in response to a detected interrupt request (IRQ);
- generating an error status packet in response to the error status;
- monitoring a serial data stream transmitted to an image signal processor;
- and
- transmitting the error status packet in a detected blanking interval of the serial data stream.
An apparatus for low latency error detection and recovery, the apparatus comprising:
- at least one memory;
- and
- at least one processor coupled to the at least one memory, the at least one processor configured to:
- read an error status in response to a detected interrupt request (IRQ);
- generate an error status packet in response to the error status;
- monitor a serial data stream transmitted to an image signal processor;
- and
- transmit the error status packet in a detected blanking interval of the serial data stream.
Dependencies are inferred from the claim text.