Back to results
US 2026/0162716 A1Published application
Memory device
AssigneesTaiwan Semiconductor Manufacturing Company, Ltd., Tsmc Nanjing Company, Limited
InventorsZhou YANG, Ying-Jhih SHIH, Chien-Yu HUANG, Jun-Cheng LIU, Ching-Wei WU
Life of this patent
Estimating the term…
Abstract
A memory device is provided, including at least one inverter, a transistor coupled between the at least one inverter and a bit line, and an assist circuit coupled to the bit line, configured to provide a negative voltage to the bit line, and configured to pull down a power supply voltage provided to the at least one inverter.
Claims20
A memory device, comprising:
- a memory cell coupled to a bit line;
- a control transistor coupled to the bit line;
- and
- an assist circuit coupled to the bit line by the control transistor, the assist circuit configured to pull down a voltage at the bit line through the control transistor, and configured to pull down a power supply voltage provided to the memory cell.
1 more element
A memory device, comprising:
- a memory cell comprising:
- a pull up transistor configured to receive a power supply voltage;
- a control transistor coupled to a bit line of the memory cell;
- and
- an assist circuit comprising:
- at least one first trace coupled to the bit line through the control transistor;
- at least one second trace configured to couple a negative voltage to the at least one first trace;
- and
- at least one third trace configured to adjust the power supply voltage in response to the negative voltage provided by the at least one second trace.
6 more elements
A memory device, comprising:
- a memory cell;
- a first control transistor coupled to a first bit line of the memory cell;
- a second control transistor coupled to a second bit line of the memory cell;
- and
- a pull down circuit configured to provide a negative voltage to the first bit line through the first control transistor or to the second bit line through the second control transistor, and configured to pull down a power supply voltage provided to the memory cell.
2 more elements
Dependencies are inferred from the claim text.