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US 2026/0162708 A1Published application
Memory with row hammer mitigation technique
AssigneeSK hynix Inc.
InventorsWoongrae KIM, Hoiju CHUNG
Life of this patent
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Abstract
A memory includes: a memory core; a list storage circuit suitable for storing a weak row list of rows that are vulnerable to a row hammer attack in the memory core; and a row hammer attack detection circuit suitable for selecting rows that are row-hammer-attacked among rows in the memory core as hammered rows, and increasing a probability that the rows stored in the list storage circuit are selected as the hammered rows.
Claims4
A memory comprising:
- a memory core;
- a list storage circuit suitable for storing a weak row list of rows that are vulnerable to a row hammer attack in the memory core;
- and
- a row hammer attack detection circuit suitable for selecting a hammered row based on a number of times that rows of the memory core are activated,
- wherein the row hammer attack detection circuit is further suitable for giving a high weight to each of the numbers corresponding to the rows stored in the list storage circuit.
2 more elements
Dependencies are inferred from the claim text.