Test device, method and system
AssigneeNuvoton Technology Corporation
InventorCheng-Chih WANG
Life of this patent
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AssigneeNuvoton Technology Corporation
InventorCheng-Chih WANG
Estimating the term…
A test device including a storage circuit and a processing circuit is provided. The storage circuit stores a machine learning model. In a training mode, the processing circuit loads the machine learning model and inputs wafer acceptance test (WAT) sample data of a sample wafer into the machine learning model to train the machine learning model to predict the process factor of each sample die of the sample wafer. In a test mode, the processing circuit inputs WAT data of a wafer to be tested into the machine learning model to predict the process factor of each die of the wafer to be tested. In the test mode, the processing circuit converts the process factor of each die of the wafer to be tested to generate a trim value and provides the trim value to a function circuit of a corresponding die of the wafer to be tested.
A test device, comprising:
A test method, comprising:
A test system, comprising:
Dependencies are inferred from the claim text.